To populate Scholarly, sign in here .

Conference

Title High Speed CMOS Pulse Generator Based on Analog Ramp Signal Implemented in 65nm CMOS Process Technology
Posted by Aileen Gumera
Authors Chandler Timm Doloriel and Aileen Caberos
Publication date 2019/11/21
Conference 2019 19th International Symposium on Communications and Information Technologies (ISCIT)
Pages 578-583
Publisher IEEE
Abstract A Low frequency signal cannot provide desired system specifications and causes unsteadiness to an electronic system. To cope up with the modern signal generation, a pulse generator should produce high speed oscillation and maintain the stability of the electronic system. This designed high speed pulse generator makes use of analog ramp signal as an input to the hysteresis comparator to produce pulse signal with 1 MHz frequency. The high speed pulse generator based on analog ramp signal is composed of voltage-to-current converter, cascode current mirror, operational amplifier, current reference, bandgap reference, schmitt trigger and hysteresis comparator. The high speed pulse generator obtained a duty cycle of 47.7% and an overall area of 0.042 μm with power consumption of 0.4316 mW. The output pulse signal is fed into a sample-and-hold circuit to test the high speed capability of the designed pulse generator.
Index terms / Keywords High speed, pulse generator, Signal generator, sample-and-hold, bandgap reference
DOI DOI: 10.1109/ISCIT.2019.8905203
URL https://ieeexplore.ieee.org/document/8905203