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Title Electrostatic Discharge (ESD) Protection Circuit for V-Band Radio Frequency (RF) Applications in a 65nm CMOS Technology
Posted by Allenn Lowaton
Authors Allenn C. Lowaton ; Lemuel Fil L. Bañez
Publication date 10/2019
Journal IOP Conference Series: Materials Science and Engineering
Volume 600
Issue 1
Pages 1-13
Publisher IOP Publishing
Abstract To apply radio frequency circuits, nanoscale CMOS technologies are greatly used but this consequence to a thinner gate oxide and silicided drain/source. With this, the electrostatic discharge (ESD) robustness of RF circuits will be much more degraded. Therefore, there is a need for an ESD protection circuit design in RF circuits against ESD damages. In this paper, the proposed ESD protection circuit is presented with concept based silicon-controlled rectifier (SCR) device, two diodes, PMOS transistor and an inductor to efficiently provide protection for radio-frequency (RF) circuits from ESD damages in nanoscale CMOS process. The concept based SCR device is aided with an inductor to provide efficient ESD path discharge to the SCR device. Moreover, the inductor is used to resonate out the parasitic capacitance generated by the ESD protection circuit at the preferred frequency. In addition, the proposed ESD protection circuit is implemented to a low noise amplifier (LNA) at 60-GHz frequency within an efficient area. Furthermore, the ESD protection circuit is simulated to achieve over 2-kV human body model ESD robustness with good RF performances on LNA in 65-nm CMOS technology.
Index terms / Keywords CMOS, electrostatic Discharge (ESD), low- noise amplifier (LNA), silicon-controlled rectifier (SCR), radio frequency (RF), V-band.
DOI 10.1088/1757-899X/600/1/012025
URL https://iopscience.iop.org/article/10.1088/1757-899X/600/1/012025/pdf